#ifndef _DRIVER_PCI_PCI_CONFIG_H
#define _DRIVER_PCI_PCI_CONFIG_H

// PCI Configuration Space registers
#define PCI_CONF_VENDOR 0x0
#define PCI_CONF_DEVICE 0x2
#define PCI_CONF_COMMAND 0x4
#define PCI_CONF_STATUS 0x6
#define PCI_CONF_REVISION 0x8
#define PCI_CONF_PROGIF 0x9
#define PCI_CONF_SUBCLASS 0xa
#define PCI_CONF_CLASS 0xb
#define PCI_CONF_HEADER_TYPE 0xe
#define PCI_CONF_BAR 0x10
#define PCI_CONF_SUB_VENDOR 0x2c
#define PCI_CONF_SUB_DEVICE 0x2e
#define PCI_CONF_ROM_BAR 0x30
#define PCI_CONF_CAP_PTR 0x34
#define PCI_CONF_INTR_LINE 0x3c
#define PCI_CONF_INTR_PIN 0x3d

// control register bits
#define PCI_CONTROL_IO_SPACE (1 << 0)
#define PCI_CONTROL_MEMORY_SPACE (1 << 1)
#define PCI_CONTROL_BUS_MASTER (1 << 2)
#define PCI_CONTROL_SPECIAL_CYCLES (1 << 3)
#define PCI_CONTROL_MEMORY_INVAILDATE (1 << 4)
#define PCI_CONTROL_VGA_PALETTE (1 << 5)
#define PCI_CONTROL_PARITY_ERROR (1 << 6)
#define PCI_CONTROL_IDSEL_STEPPING (1 << 7)
#define PCI_CONTROL_SERR (1 << 8)
#define PCI_CONTROL_FAST_BACK (1 << 9)
#define PCI_CONTROL_INTERRUPT_DISABLE (1 << 10)

// status register bits
#define PCI_STATUS_IMMEDIATE_READINESS (1 << 0)
#define PCI_STATUS_INTERRUPT (1 << 3)
#define PCI_STATUS_CAPABILITIES_LIST (1 << 4)
#define PCI_STATUS_66MHZ (1 << 5)
#define PCI_STATUS_FAST_BACK (1 << 7)
#define PCI_STATUS_MASTER_DATA_PARITY_ERROR (1 << 8)
#define PCI_STATUS_SIGNALED_TARGET_ABORT (1 << 11)
#define PCI_STATUS_RECEIVED_TARGET_ABORT (1 << 12)
#define PCI_STATUS_RECEIVED_MASTER_ERROR (1 << 13)
#define PCI_STATUS_SIGNALED_SYSTEM_ERROR (1 << 14)
#define PCI_STATUS_DETECTED_PARITY_ERROR (1 << 15)

#endif
